High bandwidth sensorless synchronisation strategies for current regulated grid connected converters

Distributed generation (DG) sources are commonly interfaced to the grid using a current regulated converter, which must be synchronized to the grid. Typically this is achieved using a phase locked loop (PLL), which must reject any harmonic distortion in the grid voltage. Conventionally this necessitates a PLL design with a low bandwidth, which then degrades the PLL's dynamic capability. In this paper an indirect or sensorless synchronization strategy is presented whereby the PLL is fed instead from the output of a stationary frame Proportional Resonant (PR) current regulator. It is shown that this structure allows for an arbitrary increase in the PLL bandwidth, with the harmonic disturbance rejection properties of the strategy further enhanced by using multiple harmonic resonators in the PR current regulator. Simulation results are presented to validate the theoretical development.