PWM DAC based Input System for Synchrophasor Algorithm Testing

Synchrophasor technology is an emerging wide-area monitoring system (WAMS) technology that provides near-real-time stability assessment capability for power networks under both static state and dynamic conditions. The accuracy and latency of the measured synchrophasor directly depend on the synchrophasor assessment algorithm and thus, many research studies are conducted by developing a plethora of synchrophasor algorithms based on several mathematical models. However, majority of these algorithms are tested on simulation platforms due to the inherent complexities in developing a hardware based comprehensive test set-up for synchrophasor performance evaluation, which limits the adoption of such algorithms in industrial applications. This study presents a pulse-width modulation (PWM) based laboratory scale input system for generating all the synchrophasor test cases defined in the IEEE std. $\mathrm {C}37.118.1/1\mathrm {a}.$ Performance of the proposed system is validated by rigorous testing across several test cases and comparison of results in both simulation and hardware platforms.