A new enhanced differential CMOS Colpitts oscillator

This paper represents a new enhanced Colpitts oscillator, which is designed based on gm-boosting of a conventional Colpitts oscillator. The proposed topology increases the negative resistant and enhances the start-up difficulty of the conventional Colpitts oscillator. This enables the Colpitts oscillator to operate in low-power consumption. Moreover, the differential and balanced structure helps limit even-order harmonics and degrades the common mode noise effects in output. The proposed circuit is designed using 0.18 μm technology and is simulated under 1.8 V supply voltage in advanced design system (ADS). Simulations show the output phase noise of -140 dBc/Hz at 1 MHz offset frequency when the operating frequency is 1 GHz.