Sigma-delta modulation based digital filter design techniques in FPGA

In this paper efficient digital filter design techniques categorized as sigma-delta modulation based short word length (SWL) and multibit (or contemporary) techniques are reviewed in terms of hardware complexity, area, performance and power tradeoffs, synthesis issues, and algorithm versatility. More recent, general purpose DSP applications including classical LMS algorithms reported using sigma-delta modulation encoding are reviewed thoroughly. A small number of basic arithmetic circuits designed using sigma-delta modulation encoding and synthesized by using FPGAs are also described. Finally, recent FPGA based areaperformance- power analysis of single-bit ternary FIR filtering is discussed and compared to its corresponding multi-bit system. This work shows that in most cases single-bit ternary FIR-like filters are able to outperform their equivalent multi-bit filters in terms of area, power, and performance.